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ATmega128
Figure 4. AVR CPU General Purpose W orking Registers
General
Purpose
W orking
Registers
7
R0
R1
R2
…
R13
R14
R15
R16
R17
…
0
Addr.
$00
$01
$02
$0D
$0E
$0F
$10
$11
R26
R27
R28
R29
R30
R31
$1A
$1B
$1C
$1D
$1E
$1F
X-register Low Byte
X-register High Byte
Y-register Low Byte
Y-register High Byte
Z-register Low Byte
Z-register High Byte
Most of the instructions operating on the Register file have direct access to all registers, and
most of them are single cycle instructions.
As shown in Figure 4 , each register is also assigned a data memory address, mapping them
directly into the first 32 locations of the user Data Space. Although not being physically imple-
mented as SRAM locations, this memory organization provides great flexibility in access of the
registers, as the X-, Y-, and Z-pointer Registers can be set to index any register in the file.
X-register, Y-register,
and Z-register
The registers R26..R31 have some added functions to their general purpose usage. These reg-
isters are 16-bit address pointers for indirect addressing of the Data Space. The three indirect
address registers X, Y, and Z are described in Figure 5 .
Figure 5. The X-, Y-, and Z-registers
15
XH
XL
0
X - register
7
0
7
0
R27 ($1B)
R26 ($1A)
15
YH
YL
0
Y - register
7
0
7
0
R29 ($1D)
R28 ($1C)
15
ZH
ZL
0
Z - register
7
0
7
0
R31 ($1F)
R30 ($1E)
In the different addressing modes these address registers have functions as fixed displacement,
automatic increment, and automatic decrement (see the Instruction Set Reference for details).
12
2467X–AVR–06/11
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